As severer restrictions have been placed on the electromagnetic interference (hereinafter referred to as the “EMC”), it is vital to reduce EMF noise in various industrial fields, such as in the field of inverters. In particular, appropriate countermeasures are required to reduce the noise caused by the switching of a semiconductor device and a module mounting the semiconductor device thereon, which are main components of the equipments used in the above-described industrial fields. The countermeasures taken against a noise generating loop include an additional provision of components, such as capacitors, ferrite cores, and various filters formed by combining the capacitors and the ferrite cores. The countermeasures taken against the EMC noise include narrowing the area of the noise generating loop. Thus, various countermeasures need to be taken depending on the use and the states of the pertinent equipments.
The EMC noise also can be reduced by improving the switching waveform (noise source). For example, an intelligent power module (hereinafter referred to as an “IPM”) that includes an insulated gate bipolar transistor (hereinafter referred to as an “IGBT”) incorporating a gate diving circuit, prevents the gate diving circuit from generating the noise. Since the IPM described above itself can reduce the noise without employing any component added externally, the above-described IPM is very effective to adding a high value thereto. Due to the desirability described above, the countermeasure as described in Mitubishi Denki Gihou, Vol. 77, No. 9 (2003), pp. 567-570 (hereafter Mitubishi publication) has been adapted for an IPM.
The IPM disclosed in the Mitubishi publication has a gate driving circuit that can select one or two current sources for driving an IGBT, depending on the collector current of the IGBT. The current-source-selection function makes the IGBT gate voltage rise slowly in a low-current region, where the turn-OFF dv/dt of a freewheel diode (hereinafter referred to as a “FWD”) is large, to realize soft switching. The IPMs that mount a driving circuit intended to reduce noise have been already put into commercial use.
Japanese Patent No. 3666843, which corresponds to U.S. Pat. No. 6,333,665, discloses a countermeasure employed in a gate driving circuit for reducing the turn-OFF loss in the semiconductor device. The countermeasure includes a capacitor connected in parallel to a resistor in the driving circuit. For the period immediately after the turn-OFF switching and until the completion of charging the capacitor, the capacitance between the gate and the emitter of the pertinent semiconductor device is discharged via the capacitor at a time constant faster than the time constant at which the capacitance between the gate and the emitter is discharged only via the gate resistance. By the scheme described above, the Miller period at the turn-OFF of the semiconductor device can be shortened to reduce the loss.
The countermeasure taken in the IPM driving circuit described in the Mitubishi publication is useful for reducing the turn-OFF noise. However, the gate resistance is set high in the low current range, where the voltage changing rate dv/dt, at which the voltage across the FWD changes at the turn-OFF, is large. Therefore, the turn-OFF noise is reduced in the low current range without taking any countermeasure against the switching loss in the tradeoff relation to the turn-OFF noise.
Since the gate resistance is changed automatically in the module, the users do not know when the current value is changed. Moreover, the users can control neither the gate resistance change nor the current value. While the inverter having the IPM described in the Mitubishi publication is operating, switching is conducted at various current values. Therefore, the gate resistance is changed automatically based on the current values in the inverter having the IPM described in the Mitubishi publication. Therefore, it is difficult to manage the dead times and the loss in the module.
For reducing the loss caused by the turn-OFF switching, the gate circuit disclosed in the Japanese Patent No. 3666843 (U.S. Pat. No. 6,333,665) disposes a capacitor in parallel with the gate resistance. By speeding up the turn-OFF, less switching loss occurs at the turn-OFF. However, if no additional countermeasure is taken, the parallel connection of the capacitor will reduce only the switching loss at the turn-OFF. The turn-OFF noise in the tradeoff relation to the switching loss will rather increase.
As described above, the switching loss and the turn-OFF noise are in a tradeoff relation with each other. For reducing both the switching loss and the turn-OFF noise and for improving the tradeoff relation, it is important to identify which part of the switching waveforms correlates strongly with the turn-OFF noise and causes the turn-OFF noise. Moreover, it is important to speed up the operation in the part of the switching waveforms that does not cause any turn-OFF noise. Therefore, the relation between the switching waveform at the turn-OFF switching and the turn-OFF noise has been investigated. FIG. 3 describes the evaluation results obtained by synchronizing a switching waveform obtained by turning OFF a DC voltage with an IGBT and a search coil waveform that is a noise index.
FIG. 3 illustrates the waveform 31 of the voltage Vce between the collector and the emitter of the IGBT, the waveform 32 of the collector current Ic, the search coil waveform 33, and the DC voltage level Vdc 34. As FIG. 3 indicates, almost no oscillation is observed on the search coil waveform 33 in the early stage of turn-OFF. At the timing “*,” at which the voltage Vce 31 between the collector and the emitter reaches the DC voltage Vdc 34, the search coil waveform 33 starts oscillating suddenly.
Therefore, the change in the switching waveform after the Vce 31 reaches the Vdc 34 is important. The voltage change rate dv/dt in the range, at which the Vce is higher than the Vdc, correlates strongly to the turn-OFF noise. Conversely, the correlation between the change on the switching waveform before the timing “*” in FIG. 3 and the turn-OFF switching noise is low. Therefore, it is desirable to speed up the turn-OFF switching before the timing “*” so that the loss caused by the turn-OFF switching can be reduced. It is also desirable to conduct the turn-OFF switching as slowly as possible after the timing “*” to prevent the turn-OFF noise.
There still remains a need to improve the tradeoff relation between the noise and the losses due to the turn-OFF switching of a power semiconductor device. The present invention addresses this need.